Yam khoom

A. Dab tsi yog FPGA chips

Tam sim no, FPGA chips ntawm kev ua lag luam feem ntau yog los ntawm Xilinx thiab Altera, uas tuav ntau dua 80% ntawm FPGA kev ua lag luam.Lwm cov tuam txhab FPGA cov khoom lag luam feem ntau yog rau qee yam kev siv tshwj xeeb, piv txwv li, Actel feem ntau tsim cov qauv tiv thaiv FPGAs kom tau raws li qhov xav tau ntawm cov khoom siv dav hlau thiab dav hlau.Cov hauv qab no yog cov khoom sawv cev ntawm ob lub tuam txhab, Altera thiab Xilinx.

Altera cov khoom raug

Altera's FPGA cov cuab yeej tau muab faib ua peb ntu: ib qho yog qhov qis-kawg Cyclone series;Qhov thib ob yog lub high-end Stratix series, thiab qhov thib peb yog Arriva series uas tuaj yeem yooj yim ASICized ntawm ob.

1. rau kev ua tau zoo Stratix series FPGAs

Stratix series FPGAs tuaj yeem pab cov neeg siv kom txo qis kev pheej hmoo thiab kev ua haujlwm siab dua sai li sai tau los tsim cov khoom lag luam siab tshaj plaws.Sib txuas ua ke siab, kev ua tau zoo, thiab nplua nuj nta, lub stratix tsev neeg ntawm FPGas tuaj yeem sib xyaw ntau dua cov cim bandwidth.Cov yam ntxwv ntawm Stratix tsev neeg ntawm cov khoom tsim tawm yog kev hloov pauv thiab txuas ntxiv mus.Cov hnub tso tawm thiab cov txheej txheem thev naus laus zis ntawm Stratix tsev neeg ntawm FPGAs tau qhia hauv Table 1-1.

Table 1-1 Stratix Series Table

Stratix FPGAs thiab Stratix GX qauv yog cov qauv ntxov tshaj plaws hauv Altera's Stratix FPGA tsev neeg.Cov tsev neeg no ntawm FPGAs ua tau zoo qhia txog DSP hardcore kev txawj ntse cov cuab yeej (IP) modules thiab Altera tau siv dav TriMatrix ntawm-chip nco thiab hloov pauv I / O architecture.

Stratix II FPGA thiab Stratix II GX qauv qhia txog Adaptive Logic Module (ALM) architecture, uas hloov 4-input LUT nrog kev ua haujlwm siab 8-input segmented lookup table (LUT).II GX FPGAs thiab lawv tseem pom zoo rau cov qauv tshiab.

Stratix III FPGAs yog qhov kev lag luam qis tshaj plaws-lub zog, kev ua haujlwm siab 65nm FPGAs.tuaj yeem ua kom zoo dua ntawm hom logic (L), lub cim xeeb, thiab kev txhim kho DSP (E) los ua ke cov neeg siv khoom tsim cov kev xav tau yam tsis muaj kev tsim nrog ntau cov peev txheej loj dua li qhov xav tau, yog li txuag cov laug cam, txo lub sijhawm sib sau, thiab txo cov nqi.Strategic III FPGAs feem ntau yog tsim los rau high-end core system ua rau ntau daim ntawv thov.

Stratix IV FPGAs muab qhov ceev tshaj plaws, kev ua tau zoo tshaj plaws, thiab kev siv hluav taws xob qis tshaj ntawm ib qho 40nm FPGA.Stratix IV FPGA tsev neeg muaj kev txhim kho (E) thiab txhim kho cov khoom siv nrog transceivers (GX thiab GT) kom tau raws li cov kev xav tau ntawm ntau lub khw thiab kev siv xws li kev sib txuas lus wireless thiab taag, tub rog, tshaj tawm, thiab ntau dua, qhov kev ua haujlwm siab 40nm FPGA tsev neeg suav nrog qhov zoo tshaj plaws hauv chav kawm 11.3 Gbps transceivers.

Stratix V FPGAs ua tiav qhov siab tshaj plaws bandwidth thiab siab tshaj plaws kev sib koom ua ke ntawm ib qho 28nm FPGA thiab hloov tau yooj yim heev.Cov cuab yeej cuab tam muaj xws li 14.1 Gbps (GS thiab GX) qauv nrog backplane tshaj, nti-rau-chip, thiab nti-rau-module functionality, nrog rau 28G (GT) transceiver qauv txhawb chip-rau-chip thiab nti-rau- module nrog ntau tshaj ib lab LEs thiab 4,096 precision-tunable DSP modules.

Altera Stratix 10 FPGAs nrog Intel's 14nm triple-gate technology muab qhov kev ua tau zoo tshaj plaws, bandwidth, thiab kev sib koom ua ke ntawm ib qho FPGA, thiab siv hluav taws xob tsawg heev.Strategic 10 li feature feature 56Gbps transceivers, 28Gbps backplanes, floating-point digital signal processing (DSP) kev ua tau zoo, thiab kev txhawb nqa rau kev txhim kho IEEE 754 Lub Stratix 10 SoC yog thawj high-end SoC tsev neeg hauv Intel's 14nm triple-gate transistor technology nrog rau tom ntej. -generation hard-core processor system optimized rau kev pom kev ua tau zoo ib watt.