(Electronic Components) 5V927PGGI8

Yam khoom

Cov ntaub ntawv & Media

Environmental & Export Classifications

Cov peev txheej ntxiv

Khoom Paub meej
24-Ntsis DIGITAL SIGNAL PROCESSOR

Lub Motorola DSP56307, ib tug tswv cuab ntawm DSP56300 tsev neeg ntawm programmable digital signal processors (DSPs), txhawb wireless infrastructure applications nrog kev lim dej dav dav.Lub on-chip enhanced lim coprocessor (EFCOP) cov txheej txheem lim algorithms nyob rau hauv parallel nrog kev ua haujlwm tseem ceeb, yog li ua kom tag nrho DSP kev ua tau zoo thiab kev ua haujlwm zoo.Ib yam li lwm cov neeg hauv tsev neeg, DSP56307 siv lub tshuab ua haujlwm siab, ib zaug-lub voj voog-ib-qhia cav (code-tshaj nrog Motorolas nrov DSP56000 core tsev neeg), lub thoob hloov pauv, 24-ntsis chaw nyob, kev qhia cache, thiab lub cim xeeb ncaj qha nkag mus tswj, raws li hauv daim duab 1. Lub DSP56307 muaj kev ua tau zoo ntawm 100 lab cov lus qhia (MIPS) ib thib ob uas siv lub moos nrog 100 MHz nrog 2.5 volt core thiab ywj siab 3.3 volt input / output zog.

Txheej txheem cej luam
Siv lub cim thib ob ASMBL (Advanced Silicon Modular Block) kem-based architecture, XC5VLX330T-3FFG1738I muaj tsib lub platform sib txawv (sub-tsev neeg), qhov kev xaiv tshaj plaws uas muaj los ntawm ib tsev neeg FPGA.Txhua lub platform muaj qhov sib txawv ntawm cov yam ntxwv los daws cov kev xav tau ntawm ntau yam ntawm cov txheej txheem siab tshaj plaws.Ntxiv rau qhov ua tau zoo tshaj plaws, kev ua tau zoo tshaj plaws logic ntaub, XC5VLX330T-3FFG1738I FPGAs muaj ntau cov txheej txheem nyuaj-IP theem thaiv, suav nrog cov haib 36-Kbit thaiv RAM / FIFOs, tiam thib ob 25 x 18 DSP hlais, Xaiv IO thev naus laus zis nrog tsim- hauv digitally-tswj impedance, Chip Sync qhov chaw-synchronous interface blocks, system saib xyuas kev ua haujlwm,

NTA
Kev ua tau zoo siab DSP56300 Core
● 100 lab cov lus qhia ib ob (MIPS) nrog 100 MHz moos ntawm 2.5 V core thiab 3.3 VI / O
● Object code tau tshaj DSP56000 core
● Cov txheej txheem qhia kev sib luag heev
● Data arithmetic logic unit (ALU)
- Puv pipelined 24 x 24-ntsis parallel multiplier-accumulator
- 56-ntsis parallel chim shifter (kev hloov ceev thiab normalization; me ntsis kwj tsim thiab parsing)
- Cov lus qhia ALU raws cai
- 24-ntsis lossis 16-ntsis lej lej txhawb nqa raws li software tswj
● Chav tswj qhov program (PCU)
- Txoj haujlwm ywj pheej code (PIC) txhawb nqa
- Chaw nyob hom optimized rau DSP daim ntawv thov (nrog rau tam sim offsets)
- On-chip kev qhia cache maub los
- On-chip nco-expandable hardware pawg
- Nested kho vajtse DO loops
- Ceev pib rov qab cuam tshuam
● Direct memory access (DMA)
- Rau DMA channel txhawb kev nkag mus rau sab hauv thiab sab nraud
- Ib-, ob-, thiab peb-dimensional hloov pauv (xws li ncig buffering)
- Xaus-ntawm-block-transfer cuam tshuam
- Ua los ntawm cov kab cuam tshuam thiab txhua qhov peripheral
● Phase-locked voj (PLL)
- Tso cai rau kev hloov pauv ntawm qhov sib faib hluav taws xob qis (DF) yam tsis muaj qhov xauv
- Tso zis moos nrog skew tshem tawm
● Kev them nyiaj yug Hardware debugging
- On-Chip Emulation (Ntawm CE) module
- Pab pawg sim ua haujlwm sib koom ua ke (JTAG) qhov chaw nkag nkag (TAP)
- Chaw nyob kab hom qhia txog qhov program hauv RAM nkag ntawm qhov chaw nres nkoj sab nraud