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XC2C256-7TQG144C QFP144 xilinx chips 1.8V Input-output kom muaj nuj nqis 118 FLASH PLD IC electronics

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Product Detail

Khoom cim npe

Yam khoom

HOM Kev piav qhia

Xaiv

Qeb Integrated Circuits (ICs)

Embedded

CPLDs (Complex Programmable Logic Devices)

 

 

 

Mfr AMD Xilinx

 

Series CoolRunner II

 

Pob Tais

 

Yam khoom Active

 

Hom Programmable Hauv System Programmable

 

Ncua Sijhawm tpd(1) Max 6.7n ib

 

Voltage Supply - Sab hauv 1.7V ~ 1.9V

 

Number of Logic Elements/Blocks 16

 

Tus naj npawb ntawm Macrocells 256

 

Tus naj npawb ntawm rooj vag 6000

 

Tus lej I/O 118

 

Ua haujlwm kub 0 ° C ~ 70 ° C (TA)

 

Mounting Hom Nto Mount

 

Pob / Case 144- QWB

 

Cov Khoom Muag Khoom Pob 144-TQFP (20 × 20)

 

Base Product Number XC2C256

 

Qhia txog yam khoom yuam kev

Saib Similar

Cov ntaub ntawv & Media

TSEEM CEEB LINK
Cov ntaub ntawv XC2C256 datasheet

CoolRunner-II CPLD Tsev Neeg

Environmental Information Xiliinx RoHS Cert

Xilinx REACH211 Cert

Khoom Featured CoolRunner™-II CPLDs
PCN Assembly / Keeb Kwm Mult Dev LeadFrame Chg 29/Oct/2018
HTML Datasheet XC2C256 datasheet

Environmental & Export Classifications

TXOJ CAI Kev piav qhia
RoHS Status ROHS3 raws
Moisture Sensitivity Level (MSL) 3 (168 teev)
REACH xwm txheej REACH Tsis muaj kev cuam tshuam
ECCN UA 99
HTSUS 8542.39.0001

 Ib tug complex programmable logic ntaus ntawv (CPLD) yog ib tug logic ntaus ntawv nrog kiag li programmable THIAB/OR arrays thiab macrocells.Macrocells yog lub tuam tsev tseem ceeb ntawm CPLD, uas muaj cov kev ua haujlwm nyuaj thiab cov laj thawj rau kev siv cov lus tsis sib xws.THIAB/OR arrays yog reprogrammable kiag li thiab lub luag hauj lwm rau kev ua ntau yam logic functions.Macrocells kuj tseem tuaj yeem txhais tau tias yog cov haujlwm ua haujlwm ua haujlwm rau kev ua cov txheej txheem sib txuas lossis kev sib txuas lus.

 Cov cuab yeej programmable logic yog ib yam khoom tshiab piv rau cov khoom siv logic ua ntej xws li programmable logic arrays (PLAs) thiab Programmable Array Logic (PAL).Cov cuab yeej logic yav dhau los tsis yog programmable, yog li cov logic tau tsim los ntawm kev sib txuas ntau lub logic chips ua ke.Ib qho CPLD muaj qhov nyuaj ntawm PALs thiab qhov chaw ua haujlwm tau qhov rooj (FPGAs).Nws kuj muaj cov yam ntxwv ntawm ob qho tib si PALs thiab FPGAs.Lub ntsiab architectural sib txawv ntawm ib tug CPLD thiab FPGA yog tias FPGAs yog raws li cov rooj saib, whereas CPLDs yog raws li hiav txwv-ntawm-qhov rooj vag.

Cov yam ntxwv zoo sib xws ntawm CPLDs thiab FPGAs yog tias lawv ob leeg muaj ntau lub rooj vag thiab hloov tau yooj yim rau cov laj thawj.Whereas cov yam ntxwv ntawm CPLDs thiab PALs suav nrog lub cim xeeb uas tsis yog-volatile configuration.CPLDs yog cov thawj coj hauv kev lag luam ntawm cov khoom siv logic programmable, muaj ntau yam txiaj ntsig zoo li kev ua haujlwm siab, tus nqi qis, tsis hloov pauv thiab siv tau yooj yim.

 Acomplex programmable logic ntaus ntawv(CPLD) yog aprogrammable logic ntaus ntawvnrog complexity ntawm uasPALsthiabFPGAs, thiab architectural nta ntawm ob qho tib si.Lub tuam tsev tseem ceeb ntawm CPLD yog amacrocell, uas muaj logic sivdisjunctive normal formcov lus qhia thiab kev ua haujlwm tshwj xeeb ntau dua.

Nta [kho]

Qee qhov CPLD cov yam ntxwv zoo sib xws nrogPALs:

  • Non-volatile configuration nco.Tsis zoo li ntau FPGAs, ib qho kev teeb tsa sab nraudROMtsis tas yuav tsum tau, thiab CPLD tuaj yeem ua haujlwm tam sim ntawm kev pib ua haujlwm.
  • Rau ntau cov cuab yeej cuab tam CPLD, routing txwv feem ntau cov logic blocks kom muaj cov tswv yim thiab cov teeb liab txuas nrog rau lwm tus pins, txo cov sijhawm rau kev cia hauv xeev thiab cov txheej txheem sib sib zog nqus.Qhov no feem ntau tsis yog qhov tseem ceeb rau CPLDs loj dua thiab cov tsev neeg CPLD tshiab.

Lwm cov nta yog sib xws nrogFPGAs:

  • Ntau lub rooj vag muaj.CPLDs feem ntau muaj qhov sib npaug ntawm ntau txhiab mus rau kaum txhiab tuslogic rooj vag, tso cai rau kev siv ntawm cov ntaub ntawv nyuaj ua cov khoom siv.PALs feem ntau muaj ob peb puas qhov sib npaug ntawm feem ntau, thaum FPGAs feem ntau muaj txij li kaum tawm txhiab mus rau ntau lab.
  • Qee cov kev cai rau logic hloov tau yooj yim duasum-of-productcov lus qhia, suav nrog cov kev tawm tswv yim nyuaj ntawm cov hlwb macro, thiab cov logic tshwj xeeb rau kev siv ntau yam kev siv feem ntau, xws litus lej lej lej.

Qhov sib txawv tshaj plaws ntawm CPLD loj thiab FPGA me me yog qhov muaj nyob rau hauv-chip uas tsis yog-volatile nco hauv CPLD, uas tso cai rau CPLDs siv rau "khau raj loader” ua haujlwm, ua ntej muab kev tswj hwm rau lwm yam khoom siv tsis muaj lawv tus kheej cov kev pabcuam ruaj khov.Ib qho piv txwv zoo yog qhov twg CPLD yog siv los thauj cov ntaub ntawv teeb tsa rau FPGA los ntawm lub cim xeeb uas tsis yog-volatile.[1]

Kev sib txawv [kho]

CPLDs yog ib kauj ruam evolutionary los ntawm cov khoom me me uas ua ntej lawv,PLAs(thawj xa los ntawmSignetics), thiabPALs.Cov no nyob rau hauv lem tau ua ntejtxheem logiccov khoom, uas tsis muaj programmability thiab tau siv los tsim cov logic zog los ntawm lub cev thaiv ob peb txheej txheem logic chips (los yog ntau pua ntawm lawv) ua ke (feem ntau yog xaim ntawm cov ntawv luam tawm los yog cov laug cam, tab sis qee zaum, tshwj xeeb tshaj yog rau kev tsim qauv, siv.xov wrapkab mob).

Qhov sib txawv tseem ceeb ntawm FPGA thiab CPLD cov cuab yeej cuab tam yog tias CPLDs yog nyob rau hauv raws lisaib rooj(LUTs) thaum FPGAs sivlogic blocks.

 


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