XCF128XFTG64C Encapsulation BGA64 XL high-density configuration thiab cia li

Yam khoom

Cov ntaub ntawv & Media

Environmental & Export Classifications

Xilinx qhia XC18V00 series ntawm hauv-system programmable configuration PROMs (Daim duab 1).Cov khoom siv hauv tsev neeg 3.3V no suav nrog 4-megabit, 2-megabit, 1-megabit, thiab 512-kilobit PROM uas muab txoj hauv kev yooj yim-touse, nqi-zoo rau reprogramming thiab khaws cia Xilinx FPGA configuration bitstreams.

Thaum FPGA nyob hauv Master Serial hom, nws tsim lub moos teeb tsa uas tsav lub PROM.Lub sijhawm luv luv tom qab CE thiab OE tau qhib, cov ntaub ntawv muaj nyob rau ntawm PROM DATA (D0) tus pin uas txuas nrog FPGA DIN tus pin.Cov ntaub ntawv tshiab muaj nyob rau lub sijhawm luv luv tom qab txhua lub moos nce.FPGA tsim cov naj npawb tsim nyog ntawm lub moos pulses kom tiav cov teeb tsa.Thaum FPGA nyob hauv Slave Serial hom, PROM thiab FPGA raug kaw los ntawm lub moos sab nraud.

Thaum FPGA nyob hauv Master Xaiv MAP hom, FPGA tsim lub moos teeb tsa uas tsav PROM.Thaum FPGA nyob rau hauv Slave Parallel lossis qhev Xaiv MAP hom, ib qho oscillator sab nraud tsim lub moos teeb tsa uas tsav lub PROM thiab FPGA.Tom qab CE thiab OE tau qhib, cov ntaub ntawv muaj nyob rau ntawm PROM's DATA (D0-D7) pins.Cov ntaub ntawv tshiab muaj nyob rau lub sijhawm luv luv tom qab txhua lub moos nce.Cov ntaub ntawv yog clocked rau hauv FPGA ntawm cov nram qab no nce ntug ntawm CCLK.Lub oscillator khiav dawb tuaj yeem siv rau hauv Slave Parallel lossis Slave Select MAP hom.

Ntau yam khoom siv tuaj yeem raug cuam tshuam los ntawm kev siv CEO tso tawm los tsav CE cov tswv yim ntawm cov cuab yeej hauv qab no.Lub moos inputs thiab DATA outputs ntawm tag nrho cov PROMs nyob rau hauv no saw yog interconnected.Tag nrho cov khoom siv tau sib xws thiab tuaj yeem ua tau nrog lwm tus neeg hauv tsev neeg lossis nrog XC17V00 ib zaug programmable serial PROM tsev neeg.